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  m54/74hc690/691 m54/74hc692/693 march 1993 hc691/693 4 bit binary counter/register (3-state) hc690/692 decade counter/register (3-state) b1r (plastic package) order codes : m54hcxxxf1r m74hcx xxm1r m74hcxxxb1r m74hcxxxc1r f1r (ceramic package) m1r (micro package) c1r (chip carrier) pin connections (top view) nc = no internal connection . high speed f max = 50 mhz (typ.) at v cc =5v . low power dissipation i cc =4 m a (max.) at t a =25 c . high noise immunity v nih =v nil =28%v cc (min.) . output drive capability 15 lsttl loads (for q a to q d ) 10 lsttl loads (for rco) . symmetrical output impedance ? i oh ? =i ol = 6 ma (min.) (for q a to q d ) ? i oh ? =i ol = 4 ma (min.) (for rco) . balanced propagation delays t plh =t phl . wide operating voltage range v cc (opr) = 2 v to 6 v . pin and function compatible with lsttl 54/74ls690/691 the hc690/691/692/693 are high speed cmos counter/register fabricated in silicon gate c 2 mos technology. they have the same high speed performance of lsttl combined with true cmos low power con- sumption. the internal circuit is composed of 3 stages includ- ing buffer output, which offers high noise immunity and stable output. these devices incorporate a syn- chronous counter, four-bit d-type register, and quadruple two-line to one-line multiplexers with three-state outputs in a single 20-pin package. the counter can be programmed from the data inputs and have enable p and enable t inputs and a ripple- carry output for easy expansion. the regis- ter/counter select input, r/c, selects the counter when low or the register when high for the three- state outputs, qa, qb, qc, and qd. if the load input (load) is held olo data input (a- d) are loaded in to the internal counter at positive edge of counter clock input (cck). in the counter mode, internal counter counts up at the positive of the counter clock. if the counter clear input (cclr) is held olo, the internal counter is cleared ( synchron- ously to the counter clock for hc692/hc693, and asynchronously for hc690/hc691). the internal description 1/23
counter's outputs are stored in the output register at the positive edge of the register clock (rck). if the register clear input (rclr) is held olo the register is cleared (synchronously to register clock for hc692/hc693 and asynchronously for hc690/hc691). all inputs are equipped with protec- tion circuits against static discharge and transient excess voltage. input and output equivalent circuit pin description pin no symbol name and function 3 to 6 a to d data inputs 7, 14 ent, enp enable inputs 15 to 18 qa to qd data outputs 1 cclr counter clear (active low) 2 cck counter clock 11 r/c counter/ register select 8 rclr register clear (active low) 9 rck register clock 19 rco ripple counter output 10 gnd ground (0v) 20 v cc positive supply voltage iec logic symbols hc691 hc692 hc693 hc690 m54/m74hc690/691/692/693 2/23
truth table inputs outpus function cclr load enp ent cck rclr rck r/c g qa qb qc qd xxxxxxxxxzzzz high impedance l x x x (*) x x l l l l l l clear counter h l x x x x l l a b c d load counter h h l x x x l l no change no count h h x l x x l l no change no count h h h h x x l l count up count up h x x x x x l l no change no count x x x x x l (*) h l l l l l clear register x x x x x h h l a' b' c' d' load register x x x x x h h l no change no load (*) : x for hc690/691 for hc692/693 x : don't care z : high impedance a-d : the level of steady state inputs at inputs a throught d respectively. a'-d' : the level of steady state outputs at internal counter outputs a' through qd' respectively hc690/692 rco = qa ? qd ? ent hc691/693 rco = qa ? qb ? qc ? qd ? ent block diagram m54/m74hc690/691/692/693 3/23
logic diagram (hc690) m54/m74hc690/691/692/693 4/23
timing chart (hc690) m54/m74hc690/691/692/693 5/23
logic diagram (hc691) m54/m74hc690/691/692/693 6/23
timing chart (hc691) m54/m74hc690/691/692/693 7/23
logic diagram (hc692) m54/m74hc690/691/692/693 8/23
timing chart (hc692) m54/m74hc690/691/692/693 9/23
logic diagram (hc693) m54/m74hc690/691/692/693 10/23
timing chart (hc693) m54/m74hc690/691/692/693 11/23
absolute maximum ratings symbol parameter value unit v cc supply voltage -0.5 to +7 v v i dc input voltage -0.5 to v cc + 0.5 v v o dc output voltage -0.5 to v cc + 0.5 v i ik dc input diode current 20 ma i ok dc output diode current 20 ma i o dc output source sink current per output pin rco 25 ma qa to qd 35 i cc or i gnd dc v cc or ground current 70 ma p d power dissipation 500 (*) mw t stg storage temperature -65 to +150 o c t l lead temperature (10 sec) 300 o c absolute maximum ratings are those values beyond which damage to the device may occur. functional operation under these condition isnotimplied. (*) 500 mw: @ 65 o c derate to 300 mw by 10mw/ o c: 65 o cto85 o c recommended operating conditions symbol parameter value unit v cc supply voltage 2 to 6 v v i input voltage 0 to v cc v v o output voltage 0 to v cc v t op operating temperature: m54hc series m74hc series -55 to +125 -40 to +85 o c o c t r ,t f input rise and fall time v cc = 2 v 0 to 1000 ns v cc = 4.5 v 0 to 500 v cc = 6 v 0 to 400 m54/m74hc690/691/692/693 12/23
dc specifications symbol parameter test conditions value unit v cc (v) t a =25 o c 54hc and 74hc -40 to 85 o c 74hc -55 to 125 o c 54hc min. typ. max. min. max. min. max. v ih high level input voltage 2.0 1.5 1.5 1.5 v 4.5 3.15 3.15 3.15 6.0 4.2 4.2 4.2 v il low level input voltage 2.0 0.5 0.5 0.5 v 4.5 1.35 1.35 1.35 6.0 1.8 1.8 1.8 v oh high level output voltage (qa - qd) 2.0 v i = v ih or v il i o =-20 m a 1.9 2.0 1.9 1.9 v 4.5 4.4 4.5 4.4 4.4 6.0 5.9 6.0 5.9 5.9 4.5 i o =-6.0 ma 4.18 4.31 4.13 4.10 6.0 i o =-7.8 ma 5.68 5.8 5.63 5.60 v oh high level output voltage (rco) 2.0 v i = v ih or v il i o =-20 m a 1.9 2.0 1.9 1.9 v 4.5 4.4 4.5 4.4 4.4 6.0 5.9 6.0 5.9 5.9 4.5 i o =-4.0 ma 4.18 4.31 4.13 4.10 6.0 i o =-5.2 ma 5.68 5.8 5.63 5.60 v ol low level output voltage (qa - qd) 2.0 v i = v ih or v il i o =20 m a 0.0 0.1 0.1 0.1 v 4.5 0.0 0.1 0.1 0.1 6.0 0.0 0.1 0.1 0.1 4.5 i o = 6.0 ma 0.17 0.26 0.37 0.40 6.0 i o = 7.8 ma 0.18 0.26 0.37 0.40 v ol low level output voltage (rco) 2.0 v i = v ih or v il i o =20 m a 0.0 0.1 0.1 0.1 v 4.5 0.0 0.1 0.1 0.1 6.0 0.0 0.1 0.1 0.1 4.5 i o = 4.0 ma 0.17 0.26 0.37 0.40 6.0 i o = 5.2 ma 0.18 0.26 0.37 0.40 i i input leakage current 6.0 v i =v cc or gnd 0.1 1 1 m a i oz 3 state output off state current 6.0 v i =v ih or v il v o =v cc or gnd 0.5 5.0 10 m a i cc quiescent supply current 6.0 v i =v cc or gnd 4 40 80 m a m54/m74hc690/691/692/693 13/23
ac electrical characteristics (c l =50pf,inputt r =t f =6ns) symbol parameter test conditions value unit v cc (v) c l (pf) t a =25 o c 54hc and 74hc -40 to 85 o c 74hc -55 to 125 o c 54hc min. typ. max. min. max. min. max. t tlh t thl output transition time (q) 2.0 50 25 60 75 90 ns 4.5 7121519 6.0 6101315 t tlh t thl output transition time (rco) 2.0 50 30 75 95 115 ns 4.5 8151923 6.0 7131620 t plh t phl propagation delay time (cck - q) 2.0 50 82 205 255 310 ns 4.5 26 41 51 62 6.0 22 35 43 53 2.0 150 95 235 295 255 ns 4.5 30 47 59 71 6.0 26 40 50 60 t plh t phl propagation delay time (rck - q) 2.0 50 86 210 265 315 ns 4.5 27 42 53 63 6.0 23 36 45 54 2.0 150 99 240 300 360 ns 4.5 31 48 60 72 6.0 26 41 51 61 t plh t phl propagation delay time (cck - rco) 2.0 50 65 165 205 250 ns 4.5 21 33 41 50 6.0 18 28 35 43 t plh t phl propagation delay time (r/c - q) 2.0 50 59 145 180 220 ns 4.5 18 29 36 44 6.0 15 25 31 37 2.0 150 72 175 220 265 ns 4.5 22 35 44 53 6.0 19 30 37 45 t plh t phl propagation delay time (ent - rco) 2.0 50 36 100 125 150 ns 4.5 12 20 25 30 6.0 10 17 21 26 t phl propagation delay time (cclr - q) (for hc690/691) 2.0 50 91 225 280 340 ns 4.5 29 45 56 68 6.0 25 38 48 58 2.0 150 104 255 320 385 ns 4.5 33 51 64 77 6.0 28 43 54 65 t phl propagation delay time (rclr - q) (for hc690/691) 2.0 50 86 210 265 315 ns 4.5 27 42 53 63 6.0 23 36 45 54 2.0 150 100 240 300 360 ns 4.5 31 48 60 72 6.0 26 41 51 61 t phl propagation delay time (cclr - rco) (for hc690/691) 2.0 50 70 175 220 265 ns 4.5 22 35 44 53 6.0 19 30 37 45 m54/m74hc690/691/692/693 14/23
symbol parameter test conditions value unit v cc (v) c l (pf) t a =25 o c 54hc and 74hc -40 to 85 o c 74hc -55 to 125 o c 54hc min. typ. max. min. max. min. max. f max maximum clock frequency 2.0 50 4.4 12 3.6 3 mhz 4.5 22 45 18 15 6.0 26 53 21 18 t pzl t pzh output enable time 2.0 50 r l =1k w 48 120 150 180 ns 4.5 15 24 30 36 6.0 13 20 26 31 2.0 150 r l =1k w 61 150 190 225 ns 4.5 19 30 38 45 6.0 17 26 32 38 t plh t phl output disable time 2.0 50 r l =1k w 32 145 180 220 ns 4.5 15 29 36 44 6.0 13 25 31 37 t w(h) t w(l) minimum pulse width (cck - rck) 2.0 50 28 75 95 110 ns 4.5 7151922 6.0 6131619 t w(l) minimum pulse width (cclr - rclr) (for hc690/691) 2.0 50 40 75 95 110 ns 4.5 8151922 6.0 7131619 t s minimum set-up time (load, ent, enp) 2.0 50 68 150 190 220 ns 4.5 17 30 38 44 6.0 14 26 32 37 t s minimum set-up time (a, b, c, d) 2.0 50 44 100 125 145 ns 4.5 11 20 25 29 6.0 9172125 t s minimum set-up time (cclr, rclr) (for hc692/693) 2.0 50 44 100 125 145 ns 4.5 11 20 25 29 6.0 9172125 t s minimum set-up time (cck, rck) 2.0 50 48 125 155 180 ns 4.5 12 25 31 36 6.0 10 21 26 31 t h minimum hold time 2.0 50 000 ns 4.5 0 0 0 6.0 0 0 0 t rem minimum removal time (for hc690/691) 2.0 50 25 30 40 ns 4.5 5 6 8 6.0 5 5 7 c in input capacitance 5 10 10 10 pf c pd (*) power dissipation capacitance for hc690/691 for hc692/693 70 80 pf (*) c pd is defined as the value of the ic's internal equivalent capacitance which is calculated from the operating current consumption without load. (refer to test circuit). average operting current can be obtained by the following equation. i cc (opr) = c pd ? v cc ? f in +i cc ac electrical characteristics (continued) m54/m74hc690/691/692/693 15/23
test circuit i cc (opr.) switching characteristics test waveform for hc690/691 m54/m74hc690/691/692/693 16/23
switching characteristics test waveform (continued) (fix maximum count) for hc692/693 for all types m54/m74hc690/691/692/693 17/23
switching characteristics (continued) t plz ,t pzl the 1 k w load resistors should be connected be- tween outputs and v cc line and the 50 pf load ca- pacitors should be connected between outputs and gnd line. all inputs except g input should be connected to v cc line or gnd line such that out- puts will be in low logic level while g input is held low. t phz ,t pzh the 1 k w load resistors and the 50 pf load capa- citors should be connected between each output and gnd line. all inputs except g input should be connected to v cc or gnd line such that output will be in high logic level while g input is held low. m54/m74hc690/691/692/693 18/23
plastic dip20 (0.25) mechanical data dim. mm inch min. typ. max. min. typ. max. a1 0.254 0.010 b 1.39 1.65 0.055 0.065 b 0.45 0.018 b1 0.25 0.010 d 25.4 1.000 e 8.5 0.335 e 2.54 0.100 e3 22.86 0.900 f 7.1 0.280 i 3.93 0.155 l 3.3 0.130 z 1.34 0.053 p001j m54/m74hc690/691/692/693 19/23
ceramic dip20 mechanical data dim. mm inch min. typ. max. min. typ. max. a 25 0.984 b 7.8 0.307 d 3.3 0.130 e 0.5 1.78 0.020 0.070 e3 22.86 0.900 f 2.29 2.79 0.090 0.110 g 0.4 0.55 0.016 0.022 i 1.27 1.52 0.050 0.060 l 0.22 0.31 0.009 0.012 m 0.51 1.27 0.020 0.050 n1 4 (min.), 15 (max.) p 7.9 8.13 0.311 0.320 q 5.71 0.225 p057h m54/m74hc690/691/692/693 20/23
so20 mechanical data dim. mm inch min. typ. max. min. typ. max. a 2.65 0.104 a1 0.10 0.20 0.004 0.007 a2 2.45 0.096 b 0.35 0.49 0.013 0.019 b1 0.23 0.32 0.009 0.012 c 0.50 0.020 c1 45 (typ.) d 12.60 13.00 0.496 0.512 e 10.00 10.65 0.393 0.419 e 1.27 0.050 e3 11.43 0.450 f 7.40 7.60 0.291 0.299 l 0.50 1.27 0.19 0.050 m 0.75 0.029 s8 (max.) p013l m54/m74hc690/691/692/693 21/23
plcc20 mechanical data dim. mm inch min. typ. max. min. typ. max. a 9.78 10.03 0.385 0.395 b 8.89 9.04 0.350 0.356 d 4.2 4.57 0.165 0.180 d1 2.54 0.100 d2 0.56 0.022 e 7.37 8.38 0.290 0.330 e 1.27 0.050 e3 5.08 0.200 f 0.38 0.015 g 0.101 0.004 m 1.27 0.050 m1 1.14 0.045 p027a m54/m74hc690/691/692/693 22/23
information furnished is believed to be accurate and reliable. however, sgs-thomson microelectronics assumes no responsability for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. no license is granted by implication or otherwise under any patent or patent rights of sgs-thomson microelectronics. specifications mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. sgs-thomson microelectronics products are not authorized for use ascritical components in life support devices or systems without express written approval of sgs-thomson microelectonics. ? 1994 sgs-thomson microelectronics - all rights reserved sgs-thomson microelectronics group of companies australia - brazil - france - germany - hong kong - italy - japan - korea - malaysia - malta - morocco - the netherlands - singapore - spain - sweden - switzerland - taiwan - thailand - united kingdom - u.s.a m54/m74hc690/691/692/693 23/23


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